IEEE Computer Society
Technical Committee on Computer Architecture (TCCA) Newsletter
Special Issue on Asynchronous Computer Architecture
October 1995
- Introduction to Asynchronous Computer Architecture, Venkatesh
Akella, Guest Editor (Postscript, 25987 bytes)
- The Design of a Fast Asynchronous Microprocessor, Sam S.
Appleton, Shannon V. Morton, Michael J. Liebelt (Postscript, 436071 bytes)
- Parallel Structures for Asynchronous Microprocessors, Philip
B. Endecott (Postscript, 171512 bytes)
- A Cache Line Fill Circuit for a Micropipelined,
Asynchronous Microprocessor, R. Mehra, J. D. Garside (Postscript, 132147 bytes)
- Performance Issues on Micropipelines, Chih-Ming Chang and
Shih-Lien Lu (Postscript, 1778853 bytes)
- VERDECT: A Verifier for Asynchronous Circuits , Jo
Ebergen, Robert Berks (Postscript, 393492 bytes)
- Synchronous Clocked and Self-timed Pipeline
Configurations, Christoph Heer (Postscript, 360412 bytes)
Membership in the Technical Committee on Computer Architecture is open to
individuals who demonstrate willingness to actively participate in the various
activities of the TC. A member/affiliate of the IEEE Computer Society may join
the TC. A membership application form is included above.
This electronic version of the TCCA Newsletter is substantially identical to
the printed hard copy version. However, certain modifications have been made to
make this version suitable for on-line viewing,
| TCCA Home Page | Technical
Activities Page | Computer Society home page |
Copyright (c) 1995 Institute of Electrical and Electronics Engineers,
Inc. All rights reserved.
Personal use of this material is permitted. However, permission
to reprint/republish this material for advertising or promotional purposes or
for creating new collective works for resale or redistribution must be obtained
from the IEEE. For information on obtaining permission, send a blank email
message to info.pub.permission@ieee.org
By choosing to view this document, you agree to all provisions
of the copyright laws protecting it.