Test Technology Newsletter
January -March, 1998
The Newsletter of the Test Technology Technical Committee of the IEEE Computer Society
NOTICE from the editor: This is the first issue published since September-October, 1997 because not enough articles were submitted to make up an issue. Please send in your TTTC and test news promptly.
Next Issue: In the next issue, we plan to report on the 1998 TTTC organization, recent technical meetings and previews of upcoming meetings.
Special Issue
Perhaps the most valuable service that TTTC provides to its members and to test engineering in general is to initiate, support and sponsor technical meetings on test. Most of our members had their first contact with TTTC at one of its technical meetings. Moreover, the recent rapid growth in TTTC membership has largely come about because many professionals who attended the technical meetings decided to join.
TTTC technical meetings are organized and managed by volunteers -- professionals who work in test and donate their time and talents to the meetings. These volunteers, usually with support from their employers, work on the committees that solicit papers and put the technical program together, find suitable sites and make the necessary physical arrangements. Without the efforts of volunteers, the smaller test workshops would not exist because the economics would not support a commercial effort. Larger meetings, such as conferences, might be feasible commercially but would no doubt cost much more to attend. We all owe thanks to the technical meeting volunteers. Their work represents professionalism at its best.
This year TTTC is sponsoring a record number of technical meetings. In this special issue, we review the meeting information that is available to us at this time to help you decide if you should attend one or more meetings. If you decide to attend a TTTC-sponsored meeting, we suggest you get more information by reviewing the meeting's advance program. Contact the meeting organizers to find out how to get a copy of the advance program.
You may also want to visit the TTTC WWW pages for information on technical meetings on test, complete with links to many of the TTTC-sponsored meetings. The TTTC web page can be found at: http://www.computer.org/tab/tttc/meetings.
TTTC Meeting at VLSI Test Symposium
All TTTC members are welcome to attend TTTC's Operations Committee meetings. The next meeting will be held during VLSI Test Symposium, Hyatt Regency Monterey Hotel in Monterey, California USA, April 26-30, 1998. All TTTC group chairs, meeting chairs and TAC chairs should prepare written reports for the meeting. Watch for a meeting schedule and agenda.
McCluskey elected to National Academy of Engineering
A prominent test engineering professor has been elected to the National Academy of Engineering. Edward J. McCluskey, professor of electrical engineering and computer science and director of the Center for Reliable Computing at Stanford, was among 84 engineers whose election to the academy as members or foreign associates was announced on Feb. 13. Election to the academy is considered one of the highest professional distinctions that a U.S. engineer can receive. Academy membership honors those who have made "important contributions to engineering theory and practice, including significant contributions to the literature of engineering theory and practice," and those who have demonstrated "unusual accomplishment in the pioneering of new and developing fields of technology."
McCluskey was cited for his contributions to logic design, computer engineering and engineering education. "Ed has made many pioneering contributions to computing, especially to understanding and designing reliable and fault-tolerant computers," said James Plummer, chairman of one of McCluskey's departments, electrical engineering. "He has won many awards, but election to the NAE is clear evidence of the impact he has had and of the importance of his work."
McCluskey received his bachelor's degree in physics and math from Bowdoin College in 1953 and a bachelor's and master's degree in electrical engineering from the Massachusetts Institute of Technology the same year. He earned his doctorate from MIT in 1956. He served as professor of electrical engineering and director of the computer center at Princeton University before coming to Stanford in 1967.
As a graduate student at MIT, McCluskey developed a way to systematically design logic circuits, the binary electronic circuits now used for all computers. As a technician at Bell Laboratories in the late 1950s, he worked on the first transistorized electronic systems for transmitting information, as communications and computer technology shifted from relays to switches.
McCluskey joined the Stanford faculty with a mandate to help introduce a computer engineering program which was officially founded in 1970. At the time, computer engineering programs were so rare that there were few students and it was hard to find qualified faculty. Now there are more than 300 students, staff and faculty in computer engineering.
McCluskey founded the Stanford Digital Systems Laboratory (now the Computer Systems Laboratory) in 1969, and he was co-founder and first director of the Computer Science Department's industrial affiliates program, begun in 1970.
As for his current research, "It was not such a big leap from worrying about how to design computers to worrying about how to test them," McCluskey said. Thus he leads the Center for Reliable Computing, where 13 graduate students (lovingly dubbed "Rats") join in the Reliability and Testability Seminar to study ways to design computer circuits that test themselves and that tolerate or minimize the effects of temporary system failures. One current project is an integrated circuit designed to put integrated circuit-testers to the test. Another technology called TOPS, for totally optimized synthesis, is a circuit design system aimed to minimize design mistakes while speeding up the design of very-high-density circuits.
Many TTTC members will recognize McCluskey as a frequent speaker and panelist at many TTTC-sponsored technical meetings. As a TTTC volunteer, Ed also founded and chairs the annual BAST/Pacific Northwest workshop held in Northern California. Among his many former graduate students are a number of TTTC volunteers and members.
McCluskey also served as the first president of the IEEE Computer Society and has received the IEEE Centennial Medal along with a number of other major awards, including an honorary doctorate from the Institute National Polytechnique de Grenoble, in 1994.
Article by Janet Basu, Stanford University, with editing by TTTC Newsletter
New Office for Test Technology TC
Due to the retirement of Doris Thomas, President of TMS, Inc., the longtime provider of office and administrative services to TTTC and to many of its sponsored technical meetings, the Test Technology Technical Committee has selected a new vendor of office services. The new service provider is CEM, Inc.
The new TTTC Office, which is located near Washington, DC, in Amissville, VA USA, is directed by Ms. Maddie Harwood, who has extensive experience in providing services to associations and meetings. Ms. Harwood and Ms. Thomas are presently engaged in managing the transition to the new office. TTTC's volunteer leaders sincerely welcome Maddie Harwood to TTTC and look forward to working with her in the coming years.
Here are the coordinates of the
new office:
Test Technology TC
1474 Freeman Drive
Amissville, VA 20106 USA
Tel: (540) 937-8280
Fax: (540) 937-3739
E-mail: mhcem@aol.com
Any TTTC-sponsored activity, such as a technical activity committee, technical meeting, standards working group, or other TTTC committee, who wishes to use the services of the TTTC Office should contact Maddie Harwood as early as possible before services are actually required.
Doris Thomas, who has been working with TTTC-sponsored meetings and TTTC for 18 years, is well known to TTTC volunteers. Her company, Technical Meeting Services, Inc., grew as TTTC's activities and sponsored meetings grew. Ed Thomas, who began his TTTC work as an ITC volunteer in 1975, joined TMS and the TTTC Office after his retirement from AT&T in 1989. Doris will continue to work with TTTC on a greatly reduced schedule. She will provide services to Southwest Test Conference in 1998, while Ed will limit his TTTC efforts to the editing of the TTTC Newsletter in 1998.
Doris and Ed Thomas can be reached at:
Changing Positions/Addresses/Email
Ben Bennetts has returned to independent consulting from his position at LogicVision. He will be consulting on DFT, including delivery of DFT courses. Ben's new coordinates are: Ben Bennetts, Bennetts Associates, Burridge Farm, Burridge, Southhampton, SO31 1BY, UK. Tel: +44 1489 581276. Fax: : +44 1489 579519. E-mail: benb@burridge.demon.co.uk
Sreejit Chakravarty has left SUNY Buffalo to accept a position at Intel. His new coordinates are: Sreejit Chakravarty, Intel, MS RN5-09, 2200 Mission College Blvd, Santa Clara, CA 95054 USA. Tel: (408) 765-5649.
Thomas Mantz has recently moved within Lucent Technologies. His new coordinates are: Thomas Mantz, Lucent Technologies, Bell Laboratories, Room 23R-137GB, 555 Union Boulevard, Allentown, PA 18103. E-mail: tfma@aloft.micro.lucent.com
Sankaran M. Menon, IDDQ Testing Workshop Finance and Local Arrangements Chair, formerly a faculty member at South Dakota School of Mines and Technology, has accepted a position at Texas Instruments, Inc. His new coordinates are: Sankaran M. Menon, Texas Instruments, 8505 Forest Lane, MS8645, Dallas, TX 75243, USA. Tel: (972)-480-1109. FAX: (972)-480-2356. E-mail: smenon@ti.com
Keep in touch! Let your colleagues in test know where you can be reached. If your position, address, e-mail, etc. are changing, please let us know. E-mail your change to: tttcnews@aol.com
News of TTTC-sponsored 1998 Technical Meetings
Memory Technology Design and Testing Workshop to visit San Jose
The 1998 Memory Technology Design and Testing Workshop will be held at the San Jose Hilton Hotel and Towers in San Jose, CA, USA from August 24-25, 1998. The meeting will address all aspects of memory design, process technologies and testability related topics. Memory circuits design, cell structures, fabrication processes, design architectures as related to testing, verification and test methods for SRM, DRAM Flash and Non-volatile memories, EPROM, EEPROM embedded memories, logic-enhanced and FIFO memories, 3-D memories and content addressable memories.
For more information contact Fabrizo Lombardi: E-mail: lombardi@cs.tamu.edu.
On-Line Testing Workshop sees new demands for cost-effective methods
The 1998 edition of the TTTC-sponsored On-Line Testing Workshop will be held in Capri, Italy on July 6-8, 1998. The workshop will provide an informal forum to discuss the increasing demands for cost-effective on-line test techniques that address the reliability needs of electronic systems with rapidly increasing complexity.
The workshop will cover all aspects of on-line testing, including: concurrent checking; periodic testing in the field; field diagnosis; self-checking digital, analog and mixed-signal circuits; coding theory; on-line and off-line BIST; synthesis of on-line testable circuits; radiation hardened/tolerant process and design techniques; sensors and detectors for on-line current monitoring, temperature and other reliability relevant parameters; fault-tolerant and fail-safe systems; and on-line testing in automotive, railway, avionics, industrial control and space applications.
For more information, contact Antonis Paschalis: E-mail: paschali@iit.nrcps.ariadne-t.gr
Rapid Systems Prototyping Workshop moves to Belgium
The Ninth IEEE International Workshop on Rapid System Prototyping will be held in Leuven, Belgium from June 3-5, 1998. The workshop, which traditionally presents and explores trends in the rapid prototyping of computer-based systems, e.g. communications, information, and manufacturing systems, will focus on improved approaches to resolving prototyping issues and problems raised by incomplete specifications, increased system complexity and reduced time to market requirements for a multitude of products.
For more information, contact Rudy Lauwereins.
E-mail: Rudy.Lauwereins@esat.kuleuven.ac.be
WWW site: http://www-src.lip6.fr/rsp/frp.cfp.html
Southwest Test Workshop '98 will focus on wafer probing
TTTC's popular Southwest Test Workshop will be held in San Diego, CA, USA from Sunday evening May 31 through Wednesday, June 3, 1998. For the fifth year, SWTW, the only IEEE-sponsored technical forum for this specialized area of testing, will focus on microelectronic wafer probe testing.
Activities will begin with registration, a reception, and a panel discussion Sunday evening. The panel will be video-taped and copies will be given to workshop attendees at the conclusion of the workshop.
Technical presentations will begin Monday morning. For two-and-a-half days, eight sessions, each with three or four presentations, will cover a wide variety of probe related issues, such as RF probing; materials research; probe card metrology; membrane probe cards; advanced probe card technology (fine pitch & high pin count); improving efficiency in wafer sort operation; vertical probes (cobra/buckling beam); and probe potpourri.
The workshop will strive to provide a balanced set of presentations that include the current best practices of wafer manufacturers and the ready-to-buy solutions for current problems from vendors.
For registration or more information contact:
William Mann, E-mail: william.mann@nb.rockwell.com
TTTC will sponsor 1998Signal Propagation on Interconnects Workshop
The 2nd Signal Propagation on Interconnects Workshop, which will be held May 13-15, 1998 in Travemunde, Germany, will be sponsored for the first time by Test Technology TC.
The SPI workshop is concerned with recent developments and approaches in the field of interconnect simulation and measurement on chips, boards and packages. The workshop will examine topics such as delta-I-noise; broadband measurement; coupling effects on interconnects; determination of characteristic parameters; field theory; ground bounce; guided waves on interconnects; measurement, modeling, and simulation of interconnects inside packages; non-linear modeling and analysis; propagation characteristics on signal and ground lines; radiation and interference; simulation techniques for interconnect structures; substrate influence on signal propagation; interconnects and testing; and delay testing with coupling.
Papers have already been submitted. For more information contact: Joachim P. Mucha,
Email: mucha@tet.uni-hannover.de
Website: http://www.tet.uni-hannover.de/SPI/spi.htm
16TH IEEE VLSI TEST SYMPOSIUM going back to Monterey
The 16TH IEEE VLSI TEST SYMPOSIUM will be held at the Hyatt Regency Monterey Hotel, Monterey, California, April 26 - April 30, 1998. IEEE VLSI Test Symposium explores emerging trends and novel concepts in testing of circuits and systems. VTS will publish a symposium proceedings and a selected set of papers will appear in a special issue of JETTA. The VTS'98 Advance Program will be published soon and will be mailed to all TTTC members.
VLSI Test Symposium is sponsored by the IEEE Computer Society Test Technology Technical Committee and the IEEE Philadelphia Section. The General Chair for VTS '98 is Rob Roy, e-mail: robroy@ichips.intel.com.
For more information, contact the TTTC Office, Tel: (540) 937-8280. Fax: (540) 937-3739. E-mail: mhcem@aol.com
WWW Site: http://griao.iro.umontreal.ca/conferen/VTS/VTS98
ETW98, the IEEE European Test Workshop, will be held in Sitges, Barcelona, Spain, May 27-29, 1998. The workshop, a well-recognized forum for presenting and discussing trends and hot topics in the area of electronic circuit and system testing, provides an ideal environment for the cross-fertilization of industrial and academic experiences and needs. All professionals interested in electronic test are invited to attend.
The workshop will publish a compendium of papers. The best contributions will be selected for publication in a special issue of the Journal of Electronic Testing: Theory and Applications (JETTA), published by Kluwer.
ETW98 is co-sponsored by the IEEE Computer Society Test Technology Technical Committee, in cooperation with the European group of Test Technology Technical Committee (ETTTC) and the Universitat Politêcnica de Catalunya.
For more information, contact: Joan Figueras,
Univ. Politêcnica de Catalunya,
E-mail: figueras@eel.upc.es
Web page: http://petrus.upc.es/etw98.html
7th IEEE North Atlantic Test Workshop will address reliability and testing issues for the 21st Century
The IEEE North Atlantic Test Workshop provides a forum for discussions on the latest issues relating to higher quality, more economical, and more efficient testing methodologies and designs. The 7th workshop, which will be held at the University of Rhode Island W. Alton Jones Campus in West Greenwich, Rhode Island, USA on May 28 and May 29, 1998, will focus on the theme Reliability and Testing Issues for the 21st Century.
The 1998 North Atlantic Test Workshop is sponsored by the IEEE Computer Society Test Technology Technical Committee and the University of Rhode Island.
For general information, contact General Chair James A. Monzel, email: jmonzel@vnet.ibm.com
Or visit the Web site: http://www.ele.uri.edu/natw98
System Test and Diagnosis Workshop releases program
The 2nd IEEE International Workshop on System Test and Diagnosis, which will be held at the facilities of the Institute for Defense Analysis (IDA), 1801 North Beauregard Street, Alexandria, Virginia, USA, April 7-9, 1998, will explore recent advances and trends in test and fault isolation of complex systems. The workshop has released their technical program. Below is a list of workshop sessions. For a complete program, contact the General Chair, Dr. William R. Simpson, Email: rsimpson@ida.org
Workshop Sessions
Tuesday, April 7, 1998
8:00-10:00 AM Registration
10:00-12:00 AM Introductory Session
Opening Address: Anthony Ambler, University of Texas
1:30-3:00 PM Diagnostic Modeling
3:30-5:00 PM Panel Session: System Test and Diagnosis
7:00-9:00 PM Cocktail Reception at Radisson
Wednesday, April 8, 1998
8:30-10:00 AM Tutorial on 1149.5
10:30-12:00 AM Test Engineering
1:30-3:00 PM Design and Test
3:30-5:00 PM Poster Session
6:30-8:30 PM Evening Social Event
Thursday, April 9, 1998
8:30-10:00 AM Test Integration
10:30 AM - Noon Test Languages
1:30-3:00 PM Panel: Looking to the Future in System Test
3:00-3:30 PM Closing Remarks
Registration Information
To register for the workshop, send the following information to: Arnold Greenspan, AROSCO, 2331 Old Court Road, Suite 103, Baltimore, MD 21208:
Please enclose a company or institution check drawn on a US bank made payable to IWSTD '98, or be prepared to pay at the door. Rates: student - $50.00 (provide photocopy of student ID); IEEE member - $75.00; (provide member number); non-member - $150.00. Credit cards are not accepted.
A block of rooms has been set aside at the Radisson Plaza Hotel, 5000 Seminary Road, Alexandria, VA 22311. Make your reservations directly with the hotel at (703) 845-1010. Cite IDA-IEEE when making your reservation to receive the meeting rate of $124.00 (single) or $144.00 (double).
If you arrive at National Airport (recommended), take the Radisson courtesy bus. The hotel is directly across the street from IDA.
THERMINIC Workshop seeks solutions to thermal problem
The 1998 Thermal Investigations of ICs and Microstructures Workshop, or THERMINIC Workshop, will be held September 27-30 at Cannes, France on the fabled Cote d'Azur.
The THERMINIC Workshops are a series of events to discuss the essential thermal questions of microelectronics and microstructures. These questions are becoming more and more critical as the increasing element density of deep sub-micron downsizing of integrated circuits necessitates thermal simulation, monitoring and cooling. The high element density of MCMs and mobile parts of microsystems raise new thermal problems that must be solved in the near future. On the other hand, thermal effects can be used as a basis of sensors and other functional structures. Workshop areas of interest are: thermal and temperature sensors; thermal simulation; electro-thermal simulation; thermal modeling and investigation of packages; measuring thermal effects and parameters; evaluation of thermal measurements; temperature mapping; coupled effects; and reliability issues.
Authors are invited to submit papers describing recent work. Panel proposals are also invited. Papers may be extended summaries (minimum 500 words) or full papers (preference is given to full paper submissions). Clearly describe the nature of the work, explain its significance, highlight novel features, and describe its current status. On the title page please indicate: title, name and affiliation of all authors, an abstract of 50 words or less, and suggested topics. Also identify a contact author and include a complete mailing address, phone number, fax number and E-mail address. Submit 5 copies by April 30, 1998 to:
Bernard Courtois, TIMA, 46 Avenue Felix Viallet, 38031 Grenoble cedex, France.
E-mail: Bernard.Courtois@imag.fr.
WWW: http://tima-cmp.imag.fr/Confs/therminic98/AppelATous.html
Defect and Fault Tolerance in VLSI Systems Symposium issues CFP
TTTC will sponsor the 1998 Defect and Fault Tolerance in VLSI Systems Symposium which will be held November 2-4 1998, Austin, TX, USA.
The symposium will provide an open forum for presentations in the field of defect and fault tolerance in ICs. One of the unique features of this symposium is to combine exciting new academic research and state of the art industrial data. Of interest are all aspects of design, manufacturing, test, reliability, and availability that are affected by defects during manufacturing and by faults during system operation. In addition to regular and invited papers, a tutorial session on yield and a panel session on fault tolerance will be held.
The symposium invites new and unpublished submissions on the following topics: yield enhancement, defect and fault tolerance issues, repair, restructuring, and reconfiguration, yield modeling, reliability, IC testing techniques, multi-chip modules (MCM), and case studies.
Authors should submit an extended summary of their paper, with up to 5 pages of text plus any number of figures and a title page with name, address, phone, fax and e-mail of the author responsible for the correspondence. Authors should send 6 copies of the extended summary by regular mail, or a single uu-encoded compressed (Unix compress or gzip) Postscript™ file via e-mail by May 8, 1998 to:
Tom Ziaja, IBM Austin, 11400 Burnet Rd., Austin, TX 78758 (USA). Tel: (512) 838 5029. Fax: (512) 838 6486.
Email: tziaja@austin.ibm.com
Web site: http://www.ee.ed.ac.uk/dft
Asian Test Symposium 1998 seeking papers
Asian Test Symposium 1998, which will be held in Singapore from December 2-4 is an annual international forum for test specialists from all over the world, but especially from Asia. Topics of interest include, but are not limited to: Automatic Test Generation and Fault Simulation, IDDQ Test, Synthesis for Testability, Design for Test, Economics of Test, Built-In Self-Test, On-Line Testing, Mixed-Signal Test, Fault Modeling and Diagnosis, Electron-Beam Testing, Simulation and Design Verification, Failure Analysis, Software Testing, and Software Design-for-Test.
Original technical papers on the above topics are invited. Submissions should not exceed 20 double-spaced pages including figures, and should include a 50-word abstract and a list of 4 to 5 keywords. Authors should include their complete addresses, phone and fax numbers and e-mail addresses. Designate a contact person and a presenter. The Program Committee also welcome proposals for panels and special topic sessions. Please submit by mail five copies of the complete manuscript by April 1, 1998 to:
Mr. Weng-Yew Wong, ATS'98 Secretary, EC Department, Singapore Polytechnic, 500 Dover Road, Singapore 139651. Tel. +65 7721473. Fax. +65 7721974
E-mail: wongwy@sp.ac.sg
Web site: http://www.sp.ac.sg/ec1/ats98.htm