| Session 1 | 4:00 – 5:45 pm | Keynote Addresses |
| 4:00 pm | Welcome: Tony Ambler, General Chair and Scott Davidson, Program Chair | |
| 4:15 pm | Keynote Address 1: Learnings from the 300mm Standardization Success, Devadas Pillai, Director, Operational Decision Support Technology, Intel | |
| 5:00 pm | Keynote Address 2: System Integration Challenging Manufacturing Test, Frank Maier, General Manager, SOC Test Platform Division, Agilent Technologies |
| 7:00 pm | Break |
| Session 2 | 6:00 – 7:00 pm | The Future of Parallel Testing. Chair: J. Rivoir, Agilent |
| 6:00 pm | Massively Parallel Testing - The Future of ASIC Testing. Ken Posse, Teseda | |
| 6:30 pm | ZIP-ATE: Zero-to-Infinity Pins ATE Using Packet Switched Network. N. Nourani and S. Vengatachalan, University of Texas at Dallas |
| 7:00 pm | Dinner |
| 7:00 am | Continental Breakfast | |
| Session 3 | 8:00 – 10:00 am | The Tester of the Future. Chair: L. Song, Teradyne |
| 8:00 am | Testers should be like rental cars - Sit down and drive. What users really need in a tester OS. Chris Nelson, Intel | |
| 8:30 am | Open Architecture Software for OPENSTAR(tm) Test Platform. Yuhai Ma, Advantest | |
| 9:00 am | Low Cost/DFT Testers + All the Missing Pieces = Truly Low Test Costs. Al Crouch, Inovys, Nikhil Dakwala, Stridge | |
| 9:30 am | Scalable Tester Architecture for Structural Test of Wafers and Packaged ICs. C. J. Clark and Mike Ricchetti, Intellitech | |
| 10:00 am | Break |
| Session 4 | 10:30 am – 12:30 pm | Test Processes of the Future. Chair: S. Comen, Texas Instruments |
| 10:30 am | The Commoditization of ATE. Joel Amtsfeld, Intel | |
| 11:00 am | The Role of Circuit Debug in the Future of ATE. Burnell West, NPTest | |
| 11:30 am | The Tester of the Future for the Factory of the Future. Jim Neeb and Andy Yiin, Intel | |
| 12:00 pm | Lean Test in the Factory of the Future. Brett Casey and Marisa Russell, Intel |
| 12:30 pm | Lunch |
| Session 5 | 1:30 – 3:00 pm | No Vectors, No Problem! Chair: R. Molyneaux, Sun |
| 1:30 pm | Test Vectors Considered Harmful. Gordon Robinson. | |
| 2:00 pm | A Low-Cost Vectorless ATE-Channel Architecture for Testing High-Speed IO Signal Integrity in High Volume Manufacturing. Bernd Laquai, Ulrich Schoettmer, Agilent | |
| 2:30 pm | How to Meet Wireless Test World. Veikko Lokusa, Jukka Antila, Tapio Koivukangas, Nokia, Markku Moilanen, Oulu University |
| Session 6 | 3:00 pm | Panel: So What is the Future of ATE? |
| Moderator: | Scott Davidson, Sun Microsystems | |
| Panelists: | John C. Johnson, Intel | |
| Rick Nelson, Test & Measurement World | ||
| Neil Kelly, LTX | ||
| Other Panelist to be Announced |
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General Chair
A. Ambler, U. T. Austin Department of Electrical and Computer Engineering Engineering Science Bldg. 513 Austin, TX 78712-1064 ambler@mail.utexas.edu |
Program Chair
S. Davidson, Sun Microsystems 910 Hermosa Court M/S USUN05-217 Sunnyvale, CA 94085 scott.davidson@sun.com |
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Finance Chair
R. Tekumalla, Sun Microsystems |
Publications Chair
M. Gala, Texas Instruments |
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Sponsored by IEEE Computer Society - Test Technology Technical Council
Page prepared by Scott Davidson
Last modified: Fri August 29, 2003